uzomaka@madonnauniversity.edu.ng
Madonna University, Akpugo Campus

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Professor Onyema Eleazer uzomaka, PhD

Professor of Engineering and Technology.

Biography

Cofounded Modatron Systems Inc, USA; Designed and Constructed Nigeria’s first computer; Founded The Centre for Computer Studies Ltd. Nigeria. AWARDS: Certificate of Appreciation for work on Computers, UNN; Distinguished Lecturer Award, SEES; Genuis Award, Caritas University, Class of 2020. Worked in the following companies: Teradyne, USA; GTE, USA; GE, USA;Modatron, USA;TCCS, NIGERIA. Lectured in the following Institutions: FIT, USA, ; IMT, UNN, CARITAS U, MADONNA U, NIGERIA.

Current Position

Dean Faculty of Engineering and Technology, Akpugo Campus.

Professional Education

  • B.Sc., EE, MIT, USA. 1969
  • M.Sc., EE, NORTHEASTERN UNIVERSITY, USA, 1974
  • PhD EE/COMPUTER ENGINEERING, FIT, USA, 1982

Time at the University

  • 2011--Present:Dean Faculty of Engineering and Technology
  • 2011--Present:Dean Faculty of Engineering and Technology
  • 2013-- 2020:Member Governing Council, Madonna University.

Courses Taught

  • Digital Electronic Circuits.
  • Computer Hardware Organisation.
  • Computer Architecture.
  • Instrumentation Engineering.
  • Microprocessor Interfacing Techniques.

Publications

Alphanumeric Information Retrieval System From Local Memory

An alphanumeric information retrieval system from local memory was built to use a standard, home television receiver as a display device. This paper describes the function, principles of operation, and hardware implementation of the video generator. The system will allow a subscriber to display, on a television set, one of four pages (a page can show 16 lines— 32 characters a line) of alphanumeric information. This, ofcourse, can be expanded to n pages by increasing the memory size and a slight modification of the circuits. In the information retrieval mode, access to a given page is accomplished via page selection bits from a computer. Character shapes for the 64 symbol ASCII subset have been implemented.

INTERFACE SIGNAL COMPATIBILITY CRITERIA FOR CHIP LEVEL SIMULATION MODEL OF MICROPROCESSORS.

Chip level simulation models that present the microprocessor as a simple multi-output element in an integrated digital system are presently being developed. Published implementations have simulated the interface response to all instructions in the various machine cycles that constitute instruction cycle. This approach inevitably introduces unnecessary redundancies resulting in increased memory requirements. The redundancies would be eliminated if one identifies a representative instruction set based on interface activity that best characterizes the behaviour of the machine. The Interface Signal Compatibility Criteria, presented herein, makes possible the use of such standard techniques as Covering Tables and Row Dominance in selecting the representative instruction set.

Research

Professional Affiliations

  • MIEEE, USA
  • MSID, USA
  • COREN, NIGERIA